AArch64 寄存器

每个处理单元有 31 个通用寄存器，64 位的用 Xn 表示，32 位的用 Wn 表示。X30 寄存器一般用作过程调用时的 link 寄存器，X31 表示 ZR（虚拟的零寄存器），详情见手册B1.2.1 和 C1.2.5

AArch64 calling convention

The 64-bit ARM (AArch64) calling convention allocates the 31 general-purpose registers as:[2]

x31 (SP): Stack pointer or a zero register, depending on context.
x30 (LR): Procedure link register, used to return from subroutines.
x29 (FP): Frame pointer.
x19 to x29: Callee-saved.
x18 (PR): Platform register. Used for some operating-system-specific special purpose, or an additional caller-saved register.
x16 (IP0) and x17 (IP1): Intra-Procedure-call scratch registers.
x9 to x15: Local variables, caller saved.
x8 (XR): Indirect return value address.
x0 to x7: Argument values passed to and results returned from a subroutine.

All registers starting with x have a corresponding 32-bit register prefixed with w. Thus, a 32-bit x0 is called w0.

Similarly, the 32 floating-point registers are allocated as:[3]

v0 to v7: Argument values passed to and results returned from a subroutine.
v8 to v15: callee-saved, but only the bottom 64 bits need to be preserved.
v16 to v31: Local variables, caller saved.

From: https://en.wikipedia.org/wiki/Calling_convention#ARM_(A64)

官方参考：Procedure Call Standard for the ARM 64-bit Architecture (AArch64)

ARM 标志寄存器

分配字符串

参考Arm Compiler armclang Reference Guide Version 6.12，可以发现其汇编有使用字符串的新方法：

      .text
    hello:
      adr r0, str_hello
      b printf
    str_hello:
      .asciz "Hello, world!\n"

指令

UXTW/UXTH/UXTB, SXTW/SXTH/SXTB

UXTW/UXTH/UXTB：Zero-extend single-word / half-word / byte
SXTW/SXTH/SXTB：Sign-extend single-word / half-word / byte

需要ADD X0, X0, W1时，需要把W1拓展成X1：ADD X0, X0, W1, UXTW
需要LDR X0, [X0, W1]时，同理：LDR X0, [X0, W1, UXTW]

遇到后边带上一个立即数的情况：
LDR W0, [X0, W1, UXTW #2]，先把W1作 Zero-extend 处理，然后 left-shift by 2，然后进行 LDR。一般这种情况，由于内存中是按字节存储，想读取一个 4 字节的数，一般会进行这种<< 2，即* 4的操作。